I2C Bus information and technical resources

The I2C bus information and technical resources page provides a further technical understanding of the I2C bus, bus buffer characteristics, explanation on the various types of bus buffers and what application is each type of bus buffer is suited for. The general information in the technical resource articles is also relevant to other 2-wire buses such as SMBus and PMBus.

technical resources

TR000: I2C terminology explained Find simple explanations of the basic terminology often used in a 2-wire bus - I2C bus discussions. TR001: Bus Buffer features comparison table This Bus Buffer features comparison table table provides a comparison between Hendon Semiconductors' and other types of commonly used bus buffers. TR002: Techniques for buffering I2C signals. Learn the techniques of buffering I2C signals that do not simply latch at the first 'LOW' signal. TR003: A simple check for whether any proposed circuit will produce false logic glitches Learn the reasons behind why an incorrectly designed opto-isolated I2C bus system may produce unwanted glitches on the bus and how to apply a simple test to reveal whether an I2C arrangement will produce problem glitches. TR004: Noise Margin in I2C systems Find out the different types of noise margin within an I2C system, learn how it is calculated and ways you can increase the noise margin in your system. TR005: Non-isolating bus extenders The earliest known attempts to extend the range of an I2C bus was by using emitter followers. This resource describes these types of bus buffers, commonly known as "bus extenders". TR006: Isolating buffers using true voltage followers Bus Buffers using true voltage followers also solve the 'LOW' latching problem by ensuring that the voltage output from the buffer on either side is always slightly higher than the input voltage necessary to drive its other side low. TR007: Isolating buffers using special logic low I/O levels Bus Buffers using special logic low I/O levels also solve the 'LOW' latching problem by having pre-determined input and output levels.